Αρχιτεκτονική παράλληλων υπολογιστών
Περιγραφή θέματος
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Course topics and logistics
Assignment 1
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Assignment 1 intro
What are threads?
User vs. kernel threads
Lecture: Convergence of parallel architectures (Chapters: 1)
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Assignment 1 data structures, ADTs, and mechanisms
Paper discussion:
- Why threads are a bad idea (for most purposes). Invited talk. In USENIX 1996 Annual Technical Conference.
- Why events are a bad idea. Rob von Behren, Jeremy Condit, and Eric Brewer. 9th Workshop on Hot Topics in Operating Systems (HotOS IX).
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Assignment 1 questions
Lecture: Convergence of parallel architectures (Chapters: 1)
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Paper discussion: J. B. Dennis and D. P. Misunas, "A Preliminary Architecture for a Basic Data-Flow Processor" Proc. 2nd Annual Symposium on Computer Architecture, Computer Architecture News, 3, 4 (December 1974), 126-132, ACM.
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Lecture: Parallel Programming Examples (Chapters: 2,3)
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- Assignment 1 due
- Assignment 2 intro
- Paper discussion: The SPLASH2 Programs: Characterization and Methodological Considerations. Steven Woo, Moriyoshi Ohara, Evan Torrie, Jaswinder Pal Singh and Anoop Gupta. In Proceedings of the 21st International Symposium on Computer Architecture, June 1995.
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Paper discussion (cont'd): The SPLASH2 Programs: Characterization and Methodological Considerations. Steven Woo, Moriyoshi Ohara, Evan Torrie, Jaswinder Pal Singh and Anoop Gupta. In Proceedings of the 21st International Symposium on Computer Architecture, June 1995.
Lecture: Ordering issues, program order, sequential order, coherency vs. consistency, memory consistency models, ensuring coherency, ensuring consistency. (Chapters: 5,9)
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- Assignment 2 due
- Assignment 3 intro
Paper discussion: Time, Clocks, and the Ordering of Events in a Distributed System. Leslie Lamport. Communications of the ACM, 21(7), pp. 558-565, July 1978.
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Lecture: Memory consistency models: sequential consistency, weak consistency, release consistency, entry consistency. (Chapters: 5,9)
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Paper discussion: Memory Consistency Models. D. Mosberger. ACM Operating Systems Review, 27(1), pp. 18-26, January 1993.
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Lecture: Providing consistency in bus-based shared memory multiprocessors. Cache coherency/memory consistency protocols, cache misses categorization. (Chapters: 6)
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- Paper discussion: Correct Memory Operation of Cache-Based Multiprocessors. C. Scheurich and M. Dubois. Proceedings of the 14th International Symposium on Computer Architecture, June 1987, pp. 234:243.
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- Lecture: Scalable shared memory machines, distributed shared memory, directory protocols, CC-NUMA, COMA, synchronization issues. (Chapters: 7, 8, 9)
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Project proposals due. After ack from instructor, start working on your projects.
Paper Discussion: An Evaluation of Directory Schemes for Cache Coherence. A. Agarwal, R. Simoni, J. Hennessy, M. Horowitz. ISCA'88.
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- Lecture: Software shared memory. Shared Virtual Memory, Instrumentation-based software DSM, Implementation issues. (Chapters: 9)
- Paper discussion: Fine-grain Access Control for Distributed Shared Memory, Ioannis Schoinas, Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, James R. Larus, David A. Wood (The Sixth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS VI), Oct. 1994).
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- Lecture: Node-to-network interfaces in message passing systems, programming considerations. Increasing message throughput. (Chapters: 10, 7.7)
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- Paper Discussion: Introduction to the Cell multiprocessor. J. A. Kahle, M. N. Day, H. P. Hofstee, C. R. Johns, T. R. Maeurer, and D. Shippy. IBM Journal of Research and Development. Volume 49, Number 4/5, 2005.
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Lecture: Node-to-network interfaces in message passing systems, programming considerations. Reducing CPU overhead. (Chapters: 10, 7.7)
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Lecture: Node-to-network interfaces in message passing systems, programming considerations. Reducing message latency. (Chapters: 10, 7.7)
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- Paper discussion: Dror, R.O.; Grossman, J. P.; Mackenzie, K.M.; Towles, B.; Chow, E.; Salmon, J.K.; Young, C.; Bank, J.A.; Batson, B.; Deneroff, M.M.; Kuskin, J.S.; Larson, R.H.; Moraes, M.A.; Shaw, D.E. Overcoming Communication Latency Barriers in Massively Parallel Scientific Computation. Micro, IEEE , vol.31, no.3, pp.8,19, May-June 2011.
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- Lecture: Why is parallel I/O important - main problems.
- Paper Discussion: Accelerating parallel analysis of scientific simulation data via Zazen. Tiankai Tu, Charles A. Rendleman, Patrick J. Miller, Federico Sacerdoti, Ron O. Dror, and David E. Shaw. Usenix FAST'10.
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- Projects due: Presentations, 15-20 mins/project.
- End of HY527
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- How to Make a Multiprocessor That Correctly Executes Multiprocess Programs. Leslie Lamport. IEEE Trans. on Computers, Vol. C-28, Number 9, pp. 690-691, September 1979.
J. E. THORNTON "Parallel Operation in the Control Data 6600," Fall Joint Computers Conference, vol. 26, pp. 33-40, 1961.
G. MOORE, "Cramming More Components onto Integrated Circuits", Electronics, p114-117, April 1965.
G. M. AMDAHL, "Validity of the Single-Processor Approach to Achieving Large Scale Computing Capabilities", AFIPS Conference Proceedings, (April 1967), 483-485.